Abstract
This study examines a modified approach to optimizing the performance of support vector machine (SVM)-type multicomputer systems through a distinct type of caching method that allocates space in the random access memory (RAM) of a computing node for caching pages. The article extensively describes research on enhancing the performance of the SVM system through memory page caching in RAM at the hardware level by implementing the SVM system based on field-programmable gate arrays (FPGA). A systematic comparative evaluation highlights a discernible enhancement in system performance relative to systems not equipped with the revised caching algorithm. These findings could prove instrumental for subsequent studies focused on optimizing the performance of SVM systems, providing empirical data to inform future investigations and potential applications in multicomputer system performance enhancement.