Conformal High-K Dielectric Coating of Suspended Single-Walled Carbon Nanotubes by Atomic Layer Deposition

Nanomaterials, 2019

Full text Open access: Gold Metadata (CSL-JSON)
DOI 10.3390/nano9081085
Data confidence 85 high
How this score is calculated

It is built from checkable properties of the record itself: whether the article has a DOI, how many independent sources confirmed its data, whether the required fields are filled in, and how recent the latest confirmation is. Disagreement between sources and a missing identifier lower it. A value of 80 or above means the record was published without further checking; 60 to 79 means it is published at reduced confidence, with a manual check advisable. A record verified by an editor by hand is never pushed below 90 by a recalculation. This scores our data about the article, not the article itself.

Abstract

As one of the highest mobility semiconductor materials, carbon nanotubes (CNTs) have been extensively studied for use in field effect transistors (FETs). To fabricate surround-gate FETs— which offer the best switching performance—deposition of conformal, weakly-interacting dielectric layers is necessary. This is challenging due to the chemically inert surface of CNTs and a lack of nucleation sites—especially for defect-free CNTs. As a result, a technique that enables integration of uniform high-k dielectrics, while preserving the CNT’s exceptional properties is required. In this work, we show a method that enables conformal atomic layer deposition (ALD) of high-k dielectrics on defect-free CNTs. By depositing a thin Ti metal film, followed by oxidation to TiO2 under ambient conditions, a nucleation layer is formed for subsequent ALD deposition of Al2O3. The technique is easy to implement and is VLSI-compatible. We show that the ALD coatings are uniform, continuous and conformal, and Raman spectroscopy reveals that the technique does not induce defects in the CNT. The resulting bilayer TiO2/Al2O3 thin-film shows an improved dielectric constant of 21.7 and an equivalent oxide thickness of 2.7 nm. The electrical properties of back-gated and top-gated devices fabricated using this method are presented.