Integrated receiver module with demultiplexer for chip-to-chip optical interconnects

Nga T. H. Nguyen, Ikechi Augustine Ukaegbu, Jamshid Sangirov, Hyo‐Hoon Park

2020

Data confidence 70 medium

How this score is calculated

It is built from checkable properties of the record itself: whether the article has a DOI, how many independent sources confirmed its data, whether the required fields are filled in, and how recent the latest confirmation is. Disagreement between sources and a missing identifier lower it. A value of 80 or above means the record was published without further checking; 60 to 79 means it is published at reduced confidence, with a manual check advisable. A record verified by an editor by hand is never pushed below 90 by a recalculation. This scores our data about the article, not the article itself.

Abstract

In this paper, an integrated optical receiver module with demultiplexer chip-to-chip optical interconnects is proposed. The receiver and demultiplexer (demux) were realized on a single chip in a 0.18 μm TSMC CMOS technology. The topology uses a 1:2 for the demux while the receiver (Rx) module consists of transimpedance amplifier (TIA) and a limiting amplifier (LA). The receiver achieved a gain of 90 dBΩ and a 3-dB bandwidth of 4.5 GHz. Clear eye diagrams were observed with a voltage swing of 375 mVpp up to 2.5 Gbps output from the Rx-Demux at 5 Gbps input signal. The integrated chip occupies an area of 594x1089 μm2 with power consumptions of 122 mA under a 1.8 V power supply This solution could be applied to CPU/memory interface where bidirectional signaling is required.