Abstract
The development of the enhancement-mode high electron mobility transistor (E-HEMT) lattice matched to InP is of considerable interest in the area of low power, high speed communications. Circuits which employ both E-mode devices and depletion mode devices (D-mode) dissipate substantially less power in comparison to circuits designed with D-mode technology only. Also, since V/sub DS/ and V/sub GS/ of an E-mode device are always both positive, no level shifting between successive stages is needed and as a resuit, considerable chip area can be saved when an E/D circuit design is utilized. However, the development of E-mode InAlAs/InGaAs/InP HEMTs has been hampered by the difficulty in achieving sufficiently large barrier heights on InAlAs. Recently, platinum contacts to InAlAs have shown excellent promise for the Schottky metal with barrier heights of up to 1.09 eV. Preliminary work on E-HEMTs using Pt gates have achieved modest success for devices with large gate lengths. Threshold voltages of 50 mV and 0 V were achieved for devices with gate lengths of 1.0 /spl mu/m and 0.5 /spl mu/m , respectively. Heretofore, no deep submicron devices have been reported. In this work, we demonstrate that with proper heterostructure and device design, E-HEMTs with excellent DC and RF performance can be achieved with gate lengths as small as 0.15 /spl mu/m that are suitable for extremely high speed, low power circuit applications.