Logic correctness of control algorithms for mechatronic discrete systems with parallel processes

2019

Closed access Metadata (CSL-JSON)
DOI 10.1117/12.2537074
Data confidence 85 high
How this score is calculated

It is built from checkable properties of the record itself: whether the article has a DOI, how many independent sources confirmed its data, whether the required fields are filled in, and how recent the latest confirmation is. Disagreement between sources and a missing identifier lower it. A value of 80 or above means the record was published without further checking; 60 to 79 means it is published at reduced confidence, with a manual check advisable. A record verified by an editor by hand is never pushed below 90 by a recalculation. This scores our data about the article, not the article itself.

Abstract

Systems, consisted of fixed quantity of operating devices and actuators, were considered in case of determined functional algorithm. It’s shown, for binary description of system’s state, including variability of transition states, can be applied a given memory criterion. Memory zero-values correspond to undetermined operating logic of a system. Whenever states, when memory equal to zero, pointing on process stage, where unregistered information was appeared. The design procedure of the relative memory calculation is shown. The construction of the process structure and functional graph is represented by the example of the assemble technology of a pneumatic cylinder. It is shown that the use of reduced memory allows reducing the laboriousness of logical synthesis of systems and control algorithms for parallel processes, as compared with Petri nets and cyclograms.