Deep Learning for Reliability Prediction of Fault Tolerant Multilevel Inverter

2024

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DOI 10.1109/lindi63813.2024.10820435
Data confidence 70 medium
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Abstract

The summation of multiple DC low-voltage sources in series results in higher power and a higher output voltage across the load, and this type of inverter is known as a cascaded multilevel inverter (CMLI). Using a larger number of switches is one of the drawbacks of multilevel inverters (MLls) in comparison with the conventional inverters, which affects the reliability of MLI. Proper fault detection, reducing the number of switches and predicting the lifetime of components may help to compensate for the mentioned disadvantages. This paper presents a new fault tolerant MLI including an analog fault detection prioritized by lifetime of components method which is adapted to Long Short-Term Memory (LSTM) deep learning method to forecast the fault and lifetime of MLI capacitors. The experimental findings demonstrate the practicability of the proposed techniques.