Abstract
This work presents a new approach to designing Arithmetic Logic Units (ALUs) using electro-optic microring resonators. The methodology covers the demonstration of full and half addition and subtraction, parity checking, and dynamic logic gates functionalities at the data speed of 10 Gbps. In this work, integrated electro-optic circuits have been meticulously designed to have minimum footprints using microring resonators (MRRs) with low losses, thus, ensuring efficient and scalable optical computing system. A unique design for electro-optic full adder/subtractor and three input odd-even parity checkers were implemented and validated successfully within the Lumerical simulation environment. Simulation results demonstrate the successful alignment of optical outputs with their respective truth tables, confirming the reliability and accuracy of the designed circuits. These advancements represent significant progress in the field of optical computing, offering notable improvements in computational speed, efficiency, and scalability. This research contributes to the ongoing exploration and development in optical computing, with the potential to revolutionize computational efficiency and performance in various applications.