Re-visiting naturally balanced average capacitor voltages in multilevel DC-DC converters

2017

Closed access Metadata (CSL-JSON)
DOI 10.1109/cpe.2017.7915233
Data confidence 70 medium
How this score is calculated

It is built from checkable properties of the record itself: whether the article has a DOI, how many independent sources confirmed its data, whether the required fields are filled in, and how recent the latest confirmation is. Disagreement between sources and a missing identifier lower it. A value of 80 or above means the record was published without further checking; 60 to 79 means it is published at reduced confidence, with a manual check advisable. A record verified by an editor by hand is never pushed below 90 by a recalculation. This scores our data about the article, not the article itself.

Abstract

Capacitor natural voltage balancing in multilevel converters is a potentially attractive feature because it does not require capacitor voltage measurement and balancing control effort. The paper addresses DC-DC step-down Flying Capacitor Converter average balanced capacitor voltages for inductance dominated LR-loads (or resistive LC-filtered ones). Capacitor voltage unbalances, or offsets compared to their expected theoretical balanced values, impose overstress on semiconductor devices and compromise output voltage quality. It is demonstrated that the unbalance problem may practically occur for 3 flying capacitor converters for relatively small resistance of inductance dominated LR-load when using modulation strategies different from classic carrier-based phase-shifted lead and lag ones. Motivation for such strategies may be improving natural balancing dynamics rate. Symbolic time domain analysis is carried out for a demo case of a three capacitor DC-DC step-down converter in a small parameter approximation. Average capacitor voltage offset expressions clearly demonstrate the dependences on load parameters and capacitances for different switching sequences.